Linking root libraries in my codes

ROOT
1

hi,

I have a code in c++ that includes root classes.

I have the make file but when I compile it returns me this error

Antonios-MacBook:Release crotalo$ make c++ -c -o ../src/sis3316_cern_root_class.o ../src/sis3316_cern_root_class.cpp In file included from ../src/sis3316_cern_root_class.cpp:29: ../src/sis3316_cern_root_class.h:30:10: fatal error: 'TApplication.h' file not found #include "TApplication.h" ^ 1 error generated. make: *** [../src/sis3316_cern_root_class.o] Error 1

here there is he makefile

[code]################################################################################

Automatically-generated file. Do not edit!

################################################################################

-include …/makefile.init

RM := rm -rf

All of the sources participating in the build are defined here

-include sources.mk
-include src/subdir.mk
-include subdir.mk
-include objects.mk

ifneq ($(MAKECMDGOALS),clean)
ifneq ($(strip $(C++_DEPS)),)
-include $(C++_DEPS)
endif
ifneq ($(strip $(C_DEPS)),)
-include $(C_DEPS)
endif
ifneq ($(strip $(CC_DEPS)),)
-include $(CC_DEPS)
endif
ifneq ($(strip $(CPP_DEPS)),)
-include $(CPP_DEPS)
endif
ifneq ($(strip $(CXX_DEPS)),)
-include $(CXX_DEPS)
endif
ifneq ($(strip $(C_UPPER_DEPS)),)
-include $(C_UPPER_DEPS)
endif
endif

-include …/makefile.defs

Add inputs and outputs from these tool invocations to the build variables

All Target

all: sis3316_offline

Tool invocations

sis3316_offline: $(OBJS) $(USER_OBJS)
@echo ‘Building target: $@’
@echo 'Invoking: GCC C++ Linker’
g++ -I/opt/local/lib/root -L/opt/local/lib/root -o “sis3316_offline” $(OBJS) $(USER_OBJS) $(LIBS)
@echo ‘Finished building target: $@’
@echo ’ ’

Other Targets

clean:
-$(RM) $(OBJS)$(C++_DEPS)$(C_DEPS)$(CC_DEPS)$(CPP_DEPS)$(EXECUTABLES)$(CXX_DEPS)$(C_UPPER_DEPS) sis3316_offline
-@echo ’ ’

.PHONY: all clean dependents
.SECONDARY:

-include …/makefile.targets
[/code]

I used a makefile made with eclipse and already working for an other similar program (which include the same classes). I did this since when I open the code with eclipse it does not allow me to change the build settings (the option does not appear)

please help me!

2

Hi,

It looks like the [color=#0000FF]-I$(ROOTSYS)/include[/color] flag is missing… You can also use [color=#0000FF]root-config --cflags[/color] to get the correct compiler flags.

Cheers, Bertrand.

3

hi Bertrand,

I included what I got from root-config --cflags, but I got the same error

nbcaciolli:Release crotalo$ make c++ -c -o ../src/sis3316_cern_root_class.o ../src/sis3316_cern_root_class.cpp In file included from ../src/sis3316_cern_root_class.cpp:29: ../src/sis3316_cern_root_class.h:30:10: fatal error: 'TApplication.h' file not found #include "TApplication.h" ^ 1 error generated. make: *** [../src/sis3316_cern_root_class.o] Error 1

the actual makefile is

[code]################################################################################

Automatically-generated file. Do not edit!

################################################################################

-include …/makefile.init

RM := rm -rf

All of the sources participating in the build are defined here

-include sources.mk
-include src/subdir.mk
-include subdir.mk
-include objects.mk

ifneq ($(MAKECMDGOALS),clean)
ifneq ($(strip $(C++_DEPS)),)
-include $(C++_DEPS)
endif
ifneq ($(strip $(C_DEPS)),)
-include $(C_DEPS)
endif
ifneq ($(strip $(CC_DEPS)),)
-include $(CC_DEPS)
endif
ifneq ($(strip $(CPP_DEPS)),)
-include $(CPP_DEPS)
endif
ifneq ($(strip $(CXX_DEPS)),)
-include $(CXX_DEPS)
endif
ifneq ($(strip $(C_UPPER_DEPS)),)
-include $(C_UPPER_DEPS)
endif
endif

-include …/makefile.defs

Add inputs and outputs from these tool invocations to the build variables

All Target

all: sis3316_offline

Tool invocations

sis3316_offline: $(OBJS) $(USER_OBJS)
@echo ‘Building target: $@’
@echo 'Invoking: GCC C++ Linker’
g++ -pthread -stdlib=libc++ -std=c++11 -m64 -I/opt/local/include/root -L/opt/local/lib/root -o “sis3316_offline” $(OBJS) $(USER_OBJS) $(LIBS)
@echo ‘Finished building target: $@’
@echo ’ ’

Other Targets

clean:
-$(RM) $(OBJS)$(C++_DEPS)$(C_DEPS)$(CC_DEPS)$(CPP_DEPS)$(EXECUTABLES)$(CXX_DEPS)$(C_UPPER_DEPS) sis3316_offline
-@echo ’ ’

.PHONY: all clean dependents
.SECONDARY:

-include …/makefile.targets
[/code]

I do not understand the error. sorry for the late replay but I did not see any notification in the mail for your post

if you need I can send you the folder with all source files

4

Well, sorry, but I don’t know Eclipse, and I only know where the error is coming from (i.e. missing include search path), so in order to fix it you should ask someone who knows Eclipse…

Cheers, Bertrand.

5

comparing all file I found the error (I did not put the .d and .o files in the correct folders)
Now it compiles from terminal.
still I have the eclipse problem… but ok I cannot have everything :smiley: