Compiling ROOT Scripts (MakeFile)

[jon2718]

Where can the official documentation be found for compiling root scripts in C++ and how to create Makefiles for ROOT?

Is CMAKE recommended for compiling ROOT scripts.

I’m looking for the official documentation (if it exists) on this.

Thank you!

[garciaduarte1]

Hello,
try using this example code as a starting point:

#
# 'make depend' uses makedepend to automatically generate dependencies 
#               (dependencies are added to end of Makefile)
# 'make'        build executable file 'mycc'
# 'make clean'  removes all .o and executable files
#

# define the C compiler to use
#CC = gcc
CC = clang
# define the C++ compiler to use
#CXX = g++
CXX = clang++

# define any compile-time flags
#CFLAGS = -Wall -g 
#CFLAGS=-c -g -Wall `root-config --cflags`
CXXFLAGS= -g -Wall `root-config --cflags`
#CXXFLAGS= -g -Wall -fopenmp `root-config --cflags`
#CXXFLAGS= -g -Werror -fopenmp `root-config --cflags`

# define any directories containing header files other than /usr/include
#INCLUDES = -I./Analysis -I../Anl
INCLUDES = -I./

# define library paths in addition to /usr/lib
#   if I wanted to include libraries not in /usr/lib I'd specify
#   their path using -Lpath, something like:
#LFLAGS = -L/home/newhall/lib  -L../lib
LFLAGS=`root-config --glibs` -lSpectrum 

# define any libraries to link into executable:
#   if I want to link in libraries (libx.so or libx.a) I use the -llibname 
#   option, something like (this will link in libmylib.so and libm.so:
#LIBS = -lmylib -lm

# define the C source files
#SRCS = emitter.c error.c init.c lexer.c main.c symbol.c parser.c

# MUST HAVE main() in the very first .cpp code
       
SRCS = myMAIN.cpp  myANN5c.cxx

# define the C object files 
#
# This uses Suffix Replacement within a macro:
#   $(name:string1=string2)
#         For each word in 'name' replace 'string1' with 'string2'
# Below we are replacing the suffix .c of all words in the macro SRCS
# with the .o suffix
#
#OBJS = $(SRCS:.c=.o)
OBJS = $(SRCS:.cpp=.o)

# define the executable file 
MAIN = ANN5c

#
# The following part of the makefile is generic; it can be used to 
# build any executable just by changing the definitions above and by
# deleting dependencies appended to the file from 'make depend'
#

.PHONY: depend clean

all:    $(MAIN)
	@echo  ANN5c has been compiled

$(MAIN): $(OBJS) 
#	$(C) $(CFLAGS) $(INCLUDES) -o $(MAIN) $(OBJS) $(LFLAGS) $(LIBS)
	$(CXX) $(CXXFLAGS) $(INCLUDES) -o $(MAIN) $(OBJS) $(LFLAGS) $(LIBS)

# this is a suffix replacement rule for building .o's from .c's
# it uses automatic variables $<: the name of the prerequisite of
# the rule(a .c file) and $@: the name of the target of the rule (a .o file) 
# (see the gnu make manual section about automatic variables)
.c.o:
#	$(CXX) $(CFLAGS) $(INCLUDES) -c $<  -o $@
	$(CXX) $(CXXFLAGS) $(INCLUDES) -c $<  -o $@

clean:
	$(RM) *.o *~ $(MAIN)

depend: $(SRCS)
	makedepend $(INCLUDES) $^

# DO NOT DELETE THIS LINE -- make depend needs it

You can find all the instructions in the comments.
Good luck.